1. Field of the Invention
The present invention relates generally to methods for concurrently burn-in stressing a plurality of semiconductor devices. More specifically, the present invention relates to so-called wafer-level burn-in stressing methods that include the application of a substantially constant voltage to each semiconductor device being concurrently stressed. More particularly, the present invention relates to wafer-level burn-in stressing methods that monitor the voltage being concurrently applied to a collection of semiconductor devices and that make appropriate adjustments to the voltage being applied to the semiconductor devices, as well as to apparatus for effecting such methods.
2. Background of Related Art
Conventionally, semiconductor devices have been burn-in stressed by exposing the semiconductor devices to an increased temperature for a prolonged period of time and, while subjecting the semiconductor devices to such an increased temperature, by applying a substantially constant voltage, typically above the operating voltage of the semiconductor devices, thereto. The goal of burn-in stressing is to induce failure in operationally borderline semiconductor devices that would have been likely to fail before the end of their prescribed or desired lifetime. Such failure is induced by driving any contaminants within the semiconductor devices into the electrical circuitry thereof or by causing any other defects in the semiconductor device to cause electrical shorting or opening therein.
Conventionally, burn-in stressing was conducted on individual semiconductor devices in order to facilitate the handling of such devices for burn-in stressing; these devices were typically packaged prior to burn-in stressing. Burn-in stressing of individual semiconductor devices requires the contacts of each individual semiconductor device to communicate with test equipment. Moreover, when packaged semiconductor devices fail burn-in stressing, the expense and time associated with packaging these failed semiconductor devices are wasted. There is an increasing demand in the industry for bare semiconductor devices that have been burn-in stressed, or “burned-in.”
Semiconductor devices may also be burn-in stressed on a larger scale, such as a so-called “wafer scale.” Typically, wafer scale burn-in stressing equipment includes contacts for communicating with the bond pads of each individual semiconductor device formed on a wafer or other large-scale substrate. This type of wafer scale burn-in stressing is effected by establishing an electrical connection between each contact of the test equipment and its corresponding bond pad of a semiconductor device on the wafer or other large-scale substrate. As a state-of-the-art wafer typically includes a great number of semiconductor devices, the number of contacts that is required in such burn-in stressing equipment to effect wafer-level burn-in is also quite large. Accordingly, this type of wafer-level burn-in stressing equipment may be very expensive. Moreover, as different wafers may include semiconductor devices with different bond pad arrangements or different dimensions, each type of wafer must be stressed with wafer-level burn-in stressing equipment that has contacts in specific, suitable locations for stressing semiconductor devices with a particular bond pad arrangement and particular dimensions.
More recently, wafers have been fabricated with force contacts that are common to and in electrical communication with groups of semiconductor devices or all of the semiconductor devices fabricated on the wafer. Wafers and other large-scale substrates that include common conductive regions that are common to groups of semiconductor devices facilitate the simultaneous stressing of all of the semiconductor devices as a pair of force contacts is electrically connected thereto. For example, one set of force contacts may be electrically connected to the common conductive regions of such a wafer or other large-scale substrate and a force voltage applied to the wafer or other large-scale substrate by that set of force contacts. In addition, when the wafer or other large-scale substrate has one or more sets of common conductive regions that are common to a plurality of semiconductor devices, the burn-in stressing equipment is not limited to use with wafers or other large-scale substrates with semiconductor devices fabricated thereon that have specific, fixed bond pad arrangements and dimensions.
When a force voltage is applied by a pair of force contacts to the common conductive regions of such a wafer or other large-scale substrate, the voltage that is actually applied across the semiconductor devices varies from the force voltage that is applied to the force contacts. This variance in voltage is at least partially attributed to electrical resistance caused by the material of the force contacts themselves, which is commonly referred to as “bulk electrode resistance”, as well as by contact resistance, which occurs at the interface between the force contacts and the common conductive regions to which the force contacts are secured or between the common conductive regions and the underlying substrate or an adjacent electrical trace. The contact resistance may vary greatly over time or due to process variations, such as oxidation or contamination of the contacts. Another component that may cause variations in the voltage at the wafer is due to the current loads of the semiconductor devices themselves, which may also vary over time or due to process variations (e.g., if a fuse methodology is used to drive grossly defective semiconductor devices). The various potential variations may result in a large variation of the voltage seen at a substrate, such as a wafer. By way of example, if 1,000 semiconductor devices, or dice, are carried upon a substrate and electrically connected to the same pairs of force and sense contacts and a 50 mA current draw is realized at each semiconductor device, the result may be a 50 A current draw across the substrate. With such a relatively large current, any changes in contact resistance, even relatively small changes, may result in large voltage changes across the substrate. Continuing with the example of a 50 A current draw, if contact resistance were to vary by only 100 mΩ, the force voltage would vary by 5 V (V=I×R; 50 A×100 mΩ=5 V). As the operational voltage of semiconductor devices is typically about 3.3 V or less, voltage variations of greater than about 100–150 mV are unacceptable. Thus, a voltage variation of 5 V would certainly be unacceptable. If the proper voltage is not applied to each semiconductor device during burn-in stressing, its reliability cannot be guaranteed.
Known stressing equipment for wafers or other large-scale substrates uses a single pair of force contacts to supply the desired voltage to a wafer or other large-scale substrate. An electrical connection between the semiconductor devices on a wafer or other large-scale substrate and such common force contacts may be established by biasing the force contacts against one or more pairs of common conductive regions on the wafer or other large-scale substrate, which in turn communicate with conductive traces that communicate with the corresponding power (VCC) and ground (VSS) bond pads of semiconductor devices carried by the wafer or other large-scale substrate. The common conductive regions are typically located adjacent the periphery of the wafer or other large-scale substrate.
Wafers or other large-scale substrates with common conductive regions that are configured to receive common force contacts are not, however, configured to facilitate the evaluation of the voltage being applied to the wafer or other large-scale substrate or to the semiconductor devices thereof which communicate with the common conductive regions.